@prefix p: <http://www.wikidata.org/prop/> .
@prefix rdfs: <http://www.w3.org/2000/01/rdf-schema#> .
@prefix schema1: <http://schema.org/> .
@prefix skos: <http://www.w3.org/2004/02/skos/core#> .
@prefix wd: <http://www.wikidata.org/entity/> .
@prefix wds: <http://www.wikidata.org/entity/statement/> .
@prefix wdt: <http://www.wikidata.org/prop/direct/> .
@prefix wdtn: <http://www.wikidata.org/prop/direct-normalized/> .
@prefix wikibase: <http://wikiba.se/ontology#> .
@prefix xsd: <http://www.w3.org/2001/XMLSchema#> .

wd:Q827773 rdfs:label "فيريلوج (برمجة)"@ar,
        "Verilog"@ca,
        "Verilog"@cs,
        "Verilog"@da,
        "Verilog"@de,
        "Verilog"@en,
        "Verilog"@es,
        "Verilog"@et,
        "وریلوگ"@fa,
        "Verilog"@fi,
        "Verilog"@fr,
        "Verilog"@ga,
        "Verilog"@he,
        "Verilog"@hu,
        "Վերիլոգ"@hy,
        "Verilog"@is,
        "Verilog"@it,
        "Verilog"@ja,
        "베릴로그"@ko,
        "Verilog"@nb,
        "Verilog"@nl,
        "Verilog"@nn,
        "Verilog"@pl,
        "Verilog"@pt,
        "Verilog"@ro,
        "Verilog"@ru,
        "Verilog"@scn,
        "Верилог"@sr,
        "Verilog"@sv,
        "ꠜꠦꠞꠤꠟꠉ"@syl,
        "Verilog"@tr,
        "Verilog"@uk,
        "Verilog"@vec,
        "Verilog"@vi,
        "Verilog"@wuu,
        "Verilog"@zh,
        "Verilog"@zh-hans,
        "Verilog"@zh-hant,
        "Verilog"@zh-hk ;
    schema1:dateModified "2026-06-11T21:39:01+00:00"^^xsd:dateTime ;
    schema1:description "yezh programmiñ"@br,
        "llenguatge de programació"@ca,
        "programovací jazyk"@cs,
        "programmeringssprog"@da,
        "Hardwarebeschreibungssprache"@de,
        "hardware description language"@en,
        "lenguaje de programación"@es,
        "ohjelmointikieli"@fi,
        "langage de description de matériel"@fr,
        "שפת תכנות"@he,
        "प्रोग्रामिंग भाषा"@hi,
        "linguaggio di descrizione dell'hardware"@it,
        "電子回路を設計するハードウェア記述言語"@ja,
        "പ്രോഗ്രാമിങ് ഭാഷ"@ml,
        "programmeertaal"@nl,
        "programmeringsspråk"@nn,
        "ਪ੍ਰੋਗਰਾਮਿੰਗ ਭਾਸ਼ਾ"@pa,
        "język programowania"@pl,
        "linguagem de programação"@pt,
        "limbaj de programare"@ro,
        "linguaggiu di discrizzioni hardware"@scn,
        "programovací jazyk"@sk,
        "programspråk"@sv,
        "Мова опису апаратури (для верифікації та синтезу)."@uk ;
    schema1:version 2504785684 ;
    wikibase:identifiers 14 ;
    wikibase:sitelinks 30 ;
    wikibase:statements 28 ;
    skos:altLabel "IEEE 1364"@ca,
        "IEEE 1364"@en,
        "Verilog HDL"@en,
        "ורילוג"@he,
        "IEEE 1364"@ja,
        "Verilog HDL"@ja,
        "Verilog-HDL"@ja,
        "VerilogHDL"@ja,
        "Verilog HDL"@uk,
        "IEEE 1364"@zh,
        "Verilog HDL"@zh ;
    p:P10283 wds:Q827773-54DF58D7-00A9-44C3-B0DB-41C5D29C5731 ;
    p:P1195 wds:Q827773-A8F10614-C88D-440A-99D7-8C746FC8A095 ;
    p:P12946 wds:Q827773-FCB0F23B-4045-493B-8439-4627F5AC9B5E ;
    p:P13591 wds:Q827773-D6DF8C06-0194-42E3-8D5D-938094E327C9 ;
    p:P1482 wds:Q827773-D4CA6206-DF70-41B5-886C-93A47B484757 ;
    p:P1889 wds:Q827773-667FDFAB-40DC-46C5-A69B-3FA94F97CE7D ;
    p:P227 wds:Q827773-64987d1e-43c2-b4ec-1143-74e4ccc997e5 ;
    p:P244 wds:Q827773-D7400134-4F09-4C88-A06E-096284DD0FBE ;
    p:P31 wds:Q827773-5748f754-41ba-ae03-5323-043a4f7bf78e,
        wds:Q827773-AAEF423A-55BF-493A-8196-A2D7D247149A ;
    p:P3417 wds:Q827773-B6FA222A-74B0-4C53-B8BF-B1D81725EF89 ;
    p:P348 wds:Q827773-27572a64-4669-7b25-62f1-f905887a8c5d,
        wds:Q827773-9b7c1475-4917-d66b-1af4-6a476faf9ced ;
    p:P3553 wds:Q827773-E7B061B8-1E1F-4B1A-AE2D-C2FD415E1C7F ;
    p:P3966 wds:Q827773-FE509B38-4409-46FB-BA50-3E907A4B4649 ;
    p:P571 wds:Q827773-FC3379ED-6E5F-4666-918F-AFFE2E48E52D ;
    p:P6366 wds:Q827773-218F6144-820E-46AE-9193-1BFC3A4601D8 ;
    p:P646 wds:Q827773-D995A748-7869-4370-97CA-9572866B7227 ;
    p:P691 wds:Q827773-5C845713-62D1-46CC-9A14-40007E266F70 ;
    p:P7078 wds:Q827773-10179E24-C773-444D-BF42-51A404F7C143,
        wds:Q827773-ab84d23f-4b7e-853e-5934-77ecd3ecc395 ;
    p:P737 wds:Q827773-2A5FBF6D-13DF-4122-B83C-A4D9D687C5D2,
        wds:Q827773-d499ab48-4c59-98e4-446e-9fc27aadebb6,
        wds:Q827773-db1ce6e0-4528-d65f-2d39-a6a74c0ea0ac ;
    p:P8189 wds:Q827773-330C7200-56EF-4DE2-AF65-9788FB8E4EBC ;
    p:P8885 wds:Q827773-75d54ee0-46fd-a227-df2c-2dbc865de924 ;
    p:P9100 wds:Q827773-24CA2815-82DB-4370-A373-422B2A41784F ;
    p:P9322 wds:Q827773-35ABA653-6B98-4E05-83B9-F21A838F0645 ;
    wdtn:P227 <https://d-nb.info/gnd/4268385-3> ;
    wdtn:P244 <http://id.loc.gov/authorities/names/sh90004761> ;
    wdtn:P6366 <https://makg.org/entity/2779030575> ;
    wdt:P10283 "C2779030575" ;
    wdt:P1195 "v" ;
    wdt:P12946 "Verilog" ;
    wdt:P13591 "concept/9d6e96b9-6a1e-47e6-b152-a61b52266be1" ;
    wdt:P1482 <https://stackoverflow.com/tags/verilog> ;
    wdt:P1889 wd:Q674926 ;
    wdt:P227 "4268385-3" ;
    wdt:P244 "sh90004761" ;
    wdt:P31 wd:Q173341,
        wd:Q1941921 ;
    wdt:P3417 "Verilog" ;
    wdt:P348 "IEEE 1800-2023" ;
    wdt:P3553 "19609390" ;
    wdt:P3966 wd:Q223335 ;
    wdt:P571 "1984-01-01T00:00:00+00:00"^^xsd:dateTime ;
    wdt:P6366 "2779030575" ;
    wdt:P646 "/m/0h3vb" ;
    wdt:P691 "ph756338" ;
    wdt:P7078 wd:Q1940914,
        wd:Q7977969 ;
    wdt:P737 wd:Q154755,
        wd:Q15777,
        wd:Q81571 ;
    wdt:P8189 "987007536924105171" ;
    wdt:P8885 "베릴로그" ;
    wdt:P9100 "verilog" ;
    wdt:P9322 "0443652-Verilog-programovaci-jazyk" .

